A thermally gated transistor

June 7, 2019 12:50 PM–1:40 PM

(Click here for flyer)

Zheng Yang, PhD

Department of Electrical and Computer Engineering, University of Illinois at Chicago

Abstract: Vanadium dioxide (VO2) is a remarkable material. It is an insulator at room temperature, while becomes a metal at high temperature (above ~340K). When a small amount of heat is supplied to increase the environment temperature from ~300K to ~400K, VO2 shows a 2-5 orders of magnitude (i.e., 100 to 100000 times) resistance changes (depending on the quality of VO2). Recent years VO2 material has attracted a great deal of attention on how to utilize the sharp resistance change across its ultrafast phase transition for solid-state device applications, such as electronic and optical switches, bolometers, sensors, oscillators, memristive devices, metamaterial devices, plasmonic devices, and perfect absorbers. In this presentation, a thermally gated transistor with a vanadium dioxide nanowire channel is discussed. The vanadium dioxide nanowires were grown using a home-built chemical vapor deposition system with optimized growth conditions. The electrodes were patterned on the nanowires using photolithography lift-off process. Multiple Ti micro-heaters were fabricated around the nanowires as multi-gate structure with various gating capabilities. The transport properties of the thermal transistors were measured under various “thermal” gating powers and at different temperatures. The results were compared to the Id-Vd and Id-Vg characteristics of regular electrically-gated field effect transistors. The results here show that the phase change materials such as VO2 provide a suitable platform for the study of the abovementioned thermally gated devices.

Bio: Zheng Yang is currently an assistant professor at Department of Electrical and Computer Engineering (ECE) in University of Illinois at Chicago (UIC). Prior to joining the faculty at ECE UIC in 2011, he was a postdoctoral fellow in School of Engineering and Applied Sciences at Harvard University during 2009-2011. He received his PhD degree (2004-2009) from Department of Electrical Engineering in University of California at Riverside; and his MS (2001-2004) and BS (1997-2001) degrees both from Department of Physics at Nanjing University majoring in semiconductor devices. His research interests are electronic materials and devices and nanoelectronics. He has been authored and co-authored more than 60 journal papers with a total citation of more than 4400/3200 times according to statistics of Google-Scholar/Web-of-Science.

Friday, June 7th, 12:50 p.m. N102
Lunch will be served at 12:30 pm


Room N102 ("Old" S&E Building)